Introduction to Computers II

Slides:
(English translation courtesy of Juan Antonio Maestro de la Cuerda)

• Module 1: From digital systems to computers.
• Module 2: Processor architecture.
• Module 3: Programming in assembly.
• Module 4: Design of the instruction format.
• Module 5: Single-cycle processor design.
• Module 6: Multicycle processor design.
• Module 7: Pipelined processor design.
• Module 8: Exceptions.
• Lab introduction.

Problems:
(English translation courtesy of Juan Antonio Maestro de la Cuerda)

• Module 2: Processor architecture (solutions of selected problems).
• Module 3: Programming in assembly (solutions of selected problems, bonus).
• Module 4: Design of the instruction format (solutions of selected problems).
• Module 5: Single-cycle processor design (solutions of selected problems).
• Module 6: Multicycle processor design (solutions of selected problems).
• Module 7: Pipelined processor design (solutions of selected problems).
• Module 8: Exceptions.
• FC2problemsWS.zip: Workspace including solved problems of module 3.

 Labs:
(English translation courtesy of Juan Antonio Maestro de la Cuerda)

• Lab 1: Discovering the Workspace.
• Lab 2: Working with the Memory.
• Lab 3: Programming with Subroutines.
• Lab 4: C and Assembly Language.
• Lab 5: Matrices

Lab Software:

• EclipseRV.zip: EclipseIDE for Embedded C/C++ Developers version 2002-03, RISC-V cross platform IDE used in labs.
• FC2labWS.zip: Workspace including labs.

Quick Guides:

• Reduced Architecture RISC-V
• Single-Cycle Microarquitecture
• Multicycle Microarchitecture
• Pipelined Microarchitecture
• Pipelined Microarchitecture - Hazards

Previous Exams:

• Older exams (ARM/MIPS architectures): only in spanish.
• Academic year 2022-23 (RISC-V architecture+pipelining+cache): model, may, june.
• Academic year 2023-24 (RISC-V architecture+pipelining+exceptions): may, june.

Didactical Simulators and other Tools:

• Compiler Explorer: Multilanguaje online Compiler.
• RISC-V Online Assembler: RISC-V online Assembler.
• Creator: RISC-V online Simulator.
• Ripes: Visual RISC-V Simulator.
• Ripes online: Visual RISC-V Simulator.
• Notepad++: Source code Editor
  • risc-v.xml: UDL (User Defined Languaje) file for RISC-V assembly formatting.

Auxiliar Bibliography:

• RISC-V Assembly Language. Programmer Manual Part I.
• RISC-V ISA.

Page created an modified by J.M. Mendías / Last update may-24